8051 Microcontroller

Working Process of Intel 8051/ Atmel 89C51   

 

Internal working of 89C51 can be separated in three parts. One, processor which process all the information inside the microcontroller. Two, memory which is responsible for storing all the information. Last one, I/O by which information are sent to or from the microcontroller.

Inside of a Processor:   
Processor is formed by the following parts:          
ALU (Arithmetic Logic Unit): ALU performs all arithmetic functional tasks like addition, subtraction, multiplication, and division, logical operations such AND, OR, and NOT.

Registers: Information are stored temporarily in register to perform a task.

Accumulator (A): A is used for all arithmetic and logical operation. A also stores the result of a task.

B register (B): The major purpose of this register is in executing multiplication and division.

Flag-register (F): Stores the type of result.

PC (Program Counter): PC points to the address of the next instruction to be executed. It holds the address 0000H when the processor is turned on. The address are sent from ACU.

ACU (Address Construction Unit): ACU constructs address and passes the address to PC.

ID (Instruction Decoder): Decodes the instructions to several small instructions.

CCU (Clock and Control Unit): Gives the clock pulse to perform a small instruction.

Internal Working Processes:
An example to elaborate the step by step actions of the 89C51 is given in figure 02. When the 89C51 microcontroller is powered up, the program counter contains 0000H address. The CCU knocks the PC to pass the address to the address bus. PC sends the address, and the CCU gives the RD signal to the ROM then ROM sends the program holding to the address 0000H to the data bus. The opcode is E5, which goes to IR, then ID breaks down the instruction into several small instructions, and order the CCU to do according the small instruction. E5 opcode which is the instruction for moving a value into register A. Then CCU orders the accumulator to get ready to take the value.

CCU tells the PC send the next address 0001H to the ROM through address bus. CCU sends the read signal to the ROM. The address 0001H contains 90, which is the opcode for transferring value from input P1 to accumulator. CCU orders the SRF P1 to send the value to the data bus, and CCU orders the accumulator to collect the value from the data bus. The accumulator collects the data from the data bus, and the first two instruction is completed.

CCU knocks the ACU, ACU generates next address 0002H. When the CCU knocks, PC sends the address to the ROM through the address bus. CCU sends the read signal to the ROM, then the ROM sends the opcode A8 to the data bus, which is the opcode for moving a value to the GPR R0. The next address in the ROM 0003H contains A0, which is the opcode for the address of the source P2. After knocking by CCU, P2 sends the value to the data bus, and the register R0 collects the value from the data bus.

Next, the PC sends the next address 0004H to the ROM through the address, CCU sends the read signal to the ROM. ROM reads the address and sends the opcode 28 to the data bus, which implies that the addition of the values of accumulator and register R0 and store the result to the accumulator. After the program is executed the PC holds 0005H.

 In ROM, address 0005H holds the opcode F5. As before the ROM sends the opcode F5 to the data bus, which indicates sending of data from accumulator. The CCU knocks the accumulator to sends the data to the data bus. Now PC holds the value 0006H. PC sends the address to the ROM through the address bus, then CCU sends the read signal to the ROM, ROM reads the address, and send the opcode to the data bus. The last opcode B0 belongs to the address of destination SFR P3. CCU knocks the P3, then the data is collected by P3 as output. After executing this opcode the all instructions are completed.

Finally, PC holds the address 0007H. The ROM contains nothing related to the address. When the ROM reads this address, the program execution is stopped.